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740 Digitizer

62.5MS/s Digitizer supporting DPP-QDC firmware
64 Channel 12 bit 62.5 MS/s Digitizer supporting DPP-QDC firmware

740 Digitizer

V1740

64 Channel 12 bit 62.5 MS/s Digitizer

  • 12 bit 62.5 MS/s ADC

  • 64 channels

  • Two ERNI SMC Dual Row 68pin connectors (32 + 32 channels)

  • 2 Vpp single ended input range (10 Vpp also available)

  • 16-bit programmable DC offset adjustment: ±1 V (±5 V)

  • Trigger Time stamps

  • Memory buffer: 192 kS/ch or 1.5 MS/ch, up to 1024 events

  • FPGA for real-time data processing

  • Programmable event size and pre-post trigger adjustment

  • Analog Sum/Majority and digital over/under threshold flags for Global Trigger logic

  • Front panel clock In/Out available for multiboard synchronisation (direct feed through or PLL based synthesis)

  • 16 programmable LVDS I/Os

  • Optical Link interface (CAEN proprietary protocol)

  • VME64X compliant interface

  • A2818(PCI) / A3818 (PCIe) Controller available for handling up to 8/32 modules Daisy chained via Optical Link

  • Firmware upgradeable via VME/Optical Link

  • Libraries, Demos (C and LabView) and Software tools for Windows and Linux


VX1740

64 Channel 12bit 62.5 MS/s Digitizer

  • 12 bit 62.5 MS/s ADC

  • 64 channels

  • Two ERNI SMC Dual Row 68pin connectors (32 + 32 channels)

  • 2 Vpp single ended input range (10 Vpp also available)

  • 16-bit programmable DC offset adjustment: ±1 V (±5 V)

  • Trigger Time stamps

  • Memory buffer: 192 kS/ch or 1.5 MS/ch, up to 1024 events

  • FPGA for real-time data processing

  • Programmable event size and pre-post trigger adjustment

  • Analog Sum/Majority and digital over/under threshold flags for Global Trigger logic

  • Front panel clock In/Out available for multiboard synchronisation (direct feed through or PLL based synthesis)

  • 16 programmable LVDS I/Os

  • Optical Link interface (CAEN proprietary protocol)

  • VME64X compliant interface

  • A2818(PCI) / A3818 (PCIe) Controller available for handling up to 8/32 modules Daisy chained via Optical Link

  • Firmware upgradeable via VME/Optical Link

  • Libraries, Demos (C and LabView) and Software tools for Windows and Linux


V1740D

64 Channel 12 bit 62.5 MS/s Digitizer supporting DPP-QDC firmware

  • 12 bit 62.5 MS/s ADC

  • 64 channels

  • Two ERNI SMC Dual Row 68pin connectors (32 + 32 channels)

  • 2 Vpp single ended input range

  • 16-bit programmable DC offset adjustment: ±1 V

  • Trigger Time stamps

  • Memory buffer: 192 kS/ch, up to 1024 events

  • FPGA for real-time data processing:

  • Programmable event size and pre-post trigger adjustment

  • Analog Sum/Majority and digital over/under threshold flags for Global Trigger logic

  • Front panel clock In/Out available for multiboard synchronisation (direct feed through or PLL based synthesis)

  • 16 programmable LVDS I/Os

  • Optical Link interface (CAEN proprietary protocol)

  • VME64X compliant interface

  • A2818 (PCI) / Features

    • 12 bit 62.5 MS/s ADC

    • 64 channels

    • Two ERNI SMC Dual Row 68pin connectors (32 + 32 channels)

    • 2 Vpp single ended input range

    • 16-bit programmable DC offset adjustment: ±1 V

    • Trigger Time stamps

    • Memory buffer: 192 kS/ch, up to 1024 events

    • FPGA for real-time data processing:

    • Programmable event size and pre-post trigger adjustment

    • Analog Sum/Majority and digital over/under threshold flags for Global Trigger logic

    • Front panel clock In/Out available for multiboard synchronisation (direct feed through or PLL based synthesis)

    • 16 programmable LVDS I/Os

    • Optical Link interface (CAEN proprietary protocol)

    • VME64X compliant interface

    • A2818 (PCI) / A3818 (PCIe) Controller available for handling up to 8/32 modules Daisy chained via Optical Link

    • Firmware upgradeable via VME/Optical Link

    • Libraries, Demos (C and LabView) and Software tools for Windows and Linux (PCIe) Controller available for handling up to 8/32 modules Daisy chained via Optical Link

  • Firmware upgradeable via VME/Optical Link

  • Libraries, Demos (C and LabView) and Software tools for Windows and Linux


VX1740D

64 Channel 12bit 62.5 MS/s Digitizer supporting DPP-QDC firmware

  • 12 bit 62.5 MS/s ADC

  • 64 channels

  • Two ERNI SMC Dual Row 68pin connectors (32 + 32 channels)

  • 2 Vpp single ended input range

  • 16-bit programmable DC offset adjustment: ±1

  • Trigger Time stamps

  • Memory buffer: 192 kS/ch, up to 1024 events

  • FPGA for real-time data processing:

  • Programmable event size and pre-post trigger adjustment

  • Analog Sum/Majority and digital over/under threshold flags for Global Trigger logic

  • Front panel clock In/Out available for multiboard synchronisation (direct feed through or PLL based synthesis)

  • 16 programmable LVDS I/Os

  • Optical Link interface (CAEN proprietary protocol)

  • VME64X compliant interface

  • A2818(PCI) / A3818 (PCIe) Controller available for handling up to 8/32 modules Daisy chained via Optical Link

  • Firmware upgradeable via VME/Optical Link

  • Libraries, Demos (C and LabView) and Software tools for Windows and Linux


DT5740

32 Channel 12 bit 62.5MS/s Digitizer

  • 12 bit 62.5 MS/s ADC

  • 32 / 16 channels

  • ERNI SMC Dual Row 68pin connector (32 channels)

  • Auxiliary ERNI SMC Dual Row 68pin connector

  • MCX connectors (16 channels by using auxiliary SMC)

  • 2 Vpp single ended input range (10 Vpp also available)

  • 16-bit programmable DC offset adjustment: ±1 V (±5 V)

  • Trigger Time stamps

  • Memory buffer: 192 kS/ch, up to 1024 events

  • FPGA for real-time data processing

  • Programmable event size and pre-post trigger adjustment

  • Optical Link interface (CAEN proprietary protocol)

  • USB 2.0 compliant interface

  • Firmware upgradeable via USB or Optical Link

  • Libraries, Demos (C and LabView) and Software tools for Windows and Linux

  • External AC-DC Power Supply Adapter (+12 V)

  • Dimensions: 154x50x164 mm3 (WxHxD)


DT5740D

32 Channel 12 bit 62.5MS/s Digitizer supporting DPP-QDC firmware

Features

  • 12 bit 62.5 MS/s ADC

  • 32 / 16 channels

  • ERNI SMC Dual Row 68pin connector (32 channels)

  • Auxiliary ERNI SMC Dual Row 68pin connector

  • MCX connectors (16 channels by using auxiliary SMC)

  • 2 Vpp single ended input range

  • 16-bit programmable DC offset adjustment: ±1 V

  • Trigger Time stamps

  • Memory buffer: 192 kS/ch, up to 1024 events

  • FPGA for real-time data processing:

  • Programmable event size and pre-post trigger adjustment

  • Optical Link interface (CAEN proprietary protocol)

  • USB 2.0 compliant interface

  • Firmware upgradeable via USB or Optical Link

  • Caen DPP-QDC demo software (windows only) with C source file for developers

  • External AC-DC Power Supply Adapter (+12 V)

  • Dimensions: 154x50x164 mm3 (WxHxD)

PSK_xn.png

상호: (주)피에스케이테크놀로지

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대표: 강태욱

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사업자등록번호: 526-81-00082

주소: 서울특별시 금천구 가산디지털1로 131

 B-502(BYC 하이시티)

전화: 02-784-8666 / 팩스: 02-784-9666

Copyright(C) PSK Technology Inc.  All Rights Reserved

B-502, 131, Gasan Digital 1-ro, Geumcheon-gu, Seoul, 08506 Korea

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