A5203

64/128-ch TDC unit for high-resolution timing applications housing the CERN picoTDC

Part of FERS-5200, the CAEN platform for the readout of large arrays of detectors (SiPM, MA-PMTs, Gas Tubes, Si detectors, …)

Timing resolution: LSB = 3.125 ps, RMS typ. ∼ 7 ps

TDC dynamic range: up to 26 bit (∼ 210 μs). Extendable to 56 bit in the FPGA

Inputs: differential LVDS signals (max common mode = 1.2 V; max absolute voltage = 1.45 V). NIM, TTL or analog signals through dedicated adapters.

Acquisition of leading/trailing edge Time of Arrival (ToA), or leading edge ToA plus Time over Threshold (ToT) of the input signals

Scalability and easy-synch: up to 128 cards (8192/16384 channels) can be managed and synchronized by a single DT5215 Concentrator Board, thanks to the optical TDlink

Janus 5203 open source software available for board configuration and DAQ control

Flexibility: a full range of accessories for different kind of applications

Boxed FERS unit (DT5203) for desktop use available – 64 channels only